In the fabrication process for semiconductor devices, numerous fabrication steps, as many as several hundred, must be executed on a silicon wafer in order to complete integrated circuits on the wafer. Generally, the process for manufacturing integrated circuits on a silicon wafer substrate typically involves deposition of a thin dielectric or conductive film on the wafer using oxidation or any of a variety of chemical vapor deposition processes; formation of a circuit pattern on a layer of photoresist material by photolithography; placing a photoresist mask layer corresponding to the circuit pattern on the wafer; etching of the circuit pattern in the conductive layer on the wafer; and stripping of the photoresist mask layer from the wafer. The wafer is typically subjected to a polishing operation to provide an extremely level starting surface on the wafer.
During the subsequent structuring of the substrate, the various processing steps are used to build up layers of conductors and dielectrics, for example, on which other layers are formed to fabricate the circuits. With structuring becoming ever finer, the associated replication processes are becoming more sensitive to surface variations on the substrate. Therefore, it has now become necessary to “re-level” the wafer surface even while production of the integrated circuits are in progress. The re-leveling operation is referred to as planarizing and is typically accomplished using the CMP (chemical mechanical planarization) method using a chemical mechanical polishing process.
In chemical mechanical polishing, an abrasive suspension agent or slurry is dispensed onto a polishing surface. Relative movement between the polishing surface and the wafer produces a combined mechanical and chemical effect on the surface of the wafer. This process creates a highly level surface on the wafer. In order to remove the still-moist remains of slurry, as well as small surface defects which may remain in the wafer and disrupt the otherwise planar continuity of the wafer surface after the CMP process, post-CMP cleaning steps are required.
One of the cleaning steps carried out after the chemical mechanical polishing process is facilitated using rotating scrubber brushes which are actuated inside a scrubber cleaner. Accordingly, a special washing fluid and a rotational movement with multiple pairs of scrubber brushes can clean both sides of the wafer using contact pressure against the wafer. Because the wafer becomes considerably more valuable with each successive planarizing operation, the post-CMP brush cleaning operation is commercially significant.
One of the most common post-CMP scrubber cleaners used to remove residues from a wafer substrate after a CMP operation is the MIRRA MESA brush scrubber cleaner. The MIRRA MESA brush scrubber cleaner cleans wafers using a combination of rinsing, megasonic rinsing, and brush cleaning. The wafer substrates, having been previously subjected to chemical mechanical planarization, are loaded into a wet environment, typically water, and then transported through a series of cleaning chambers for the brush cleaning cycle. The brush cleaning cycle involves rotating the wafer at a specific speed, typically about 1500 rpm, while a jet of deionized water is sprayed on the wafer to dislodge any loose debris from the CMP process. Simultaneously, the wafer is brushed with a foam brush, which rotates at typically about 400 rpm.
Referring to FIG. 1, a post-CMP wafer cleaning system 50 typically includes an input shuttle 11 which can receive multiple wafers 12, carried in a cassette 14 provided in a pod 10, from a polish unit (not shown). A walking beam (not shown) removes individual wafers 12 from the input shuttle 11 and transports the wafers 12 to a mega tank 11a, first brush station 16a, a second brush station 16b, an SRD station 20 and an output shuttle 22, step-by-step. In the first brush station 16a and second brush station 16b, each wafer 12 is scrubbed with selected chemicals and water. Next, the wafer 12 is transported to the spin, rinse and dry (SPD) station 20, where water is sprayed onto the surface of the wafer 12 as the wafer 12 is rotated at a speed of typically about 180˜400 rpm, and then spun dry. Finally, the wafer 12 is transported from the SPD station 20 to the output station 22. The cleaned wafers 12 are placed in a cassette 14 provided in a pod 23 for transport of the wafers 12 to the next processing station.
A brush assembly 30, shown in FIG. 2, is provided in each of the first brush station 16a and second brush station 16b. The brush assembly 30 includes a pair of parallel, adjacent, generally cylindrical scrubber brushes 32 mounted on respective brush shafts 34. Drive motors (not shown) operably engage the brush shafts 34 to rotate each scrubber brush 32. One of the brushes 32 is typically rotated in the clockwise direction, whereas the other brush 32 is typically rotated in the counterclockwise direction.
In operation, a wafer 12 is vertically positioned between the rotating brushes 32. The brushes 32 are rotated by the drive motors (not shown) to scrub the respective sides of the wafer 12 and remove post-CMP particles from the wafer 12. Simultaneously, deionized water is typically sprayed onto both sides of the wafer 12 to wash the dislodged particles from the wafer surfaces. The frictional force of each brush 32 against the wafer 12 can typically be adjusted by outward or inward movement of the brushes 32, as indicated by the straight double-headed arrows in FIG. 2.
The post-CMP scrubber brush method for removing particles and remaining surface defects from the surface of a planarized wafer is attended by several disadvantages, one of the foremost being that the scrubber brush has a tendency to trap and become contaminated with the larger particles removed from the wafer. Consequently, the trapped particles may potentially become dislodged from the scrubber brush upon cleaning and planarization of a subsequent wafer. In the semiconductor fabrication industry, minimization of particle contamination on semiconductor wafers increases in importance as the integrated circuit devices on the wafers decrease in size. With the reduced size of the devices, a contaminant having a particular size occupies a relatively larger percentage of the available space for circuit elements on the wafer as compared to wafers containing the larger devices of the past. Moreover, the presence of particles in the integrated circuits compromises the functional integrity of the devices in the finished electronic product.
One of the solutions to the brush-induced contamination problem includes regular replacement of the scrubber brushes 32. After replacement of the brushes 32, the contact pressure of the brushes 32 must be calibrated to exert the correct frictional force of the brushes 32 against wafers 12 subsequently cleaned between the brushes 32. A typical conventional contact pressure calibration procedure for a post-CMP cleaning apparatus is shown in FIGS. 3A and 3B.
As shown in FIG. 3A, in a first step after the replacement brushes 32 are installed, the baseline contact pressure of the brushes 32 is defined as the pressure which corresponds to the position of the brushes 32 when the brushes 32 are just touching each other in the closed configuration. Accordingly, the hard-stop of the brush scrubber tool is adjusted to close the gap distance between the brushes 32, such that the bristles 33 of the brushes 32 just touch each other.
Next, as shown in FIG. 3B, in a second step the hard stop of the scrubber tool is adjusted to move the brushes 32 closer to each other until the bristles 33 of the brushes 32 are overlapping each other by 1 mm. At that point, the contact pressure of the brushes 32 is correctly calibrated for the scrubber cleaning of post-CMP wafers.
A common limitation of the brush contact pressure calibration procedure outline above is the difficulty of visually determining whether the brushes are just touching each other in the step of FIG. 3A. This is compounded by distortion of the generally cylindrical shape of the brushes during storage or replacement. In the event that the brushes are not correctly positioned with respect to each other in the step of FIG. 3A, this will result in an incorrect position of the brushes in the step of FIG. 3B. Consequently, the contact pressure, and thus, the frictional force, of the brushes against production wafers during cleaning will be either excessive or inadequate. Excessive frictional force of the brushes against the wafers tends to scratch the wafers, whereas inadequate frictional force of the brushes leads to incomplete removal of particulate contaminants from the wafers. Accordingly, a novel calibration procedure is needed for calibrating the contact pressure of scrubber brushes in a post-CMP wafer cleaner.
Accordingly, an object of the present invention is to provide a novel apparatus and method for calibrating the contact pressure and frictional force of scrubber brushes against a wafer.
Another object of the present invention is to provide a novel apparatus and method which is capable of promoting optimum post-CMP cleaning of wafers.
Still another object of the present invention is to provide a novel apparatus and method which is capable of preventing excessive scratching of wafers, particularly during post-CMP cleaning of the wafers.
Yet another object of the present invention is to provide a novel brush pressure calibration apparatus and method for correlating the frictional force of adjacent scrubber brushes against respective surfaces of a wafer with the gap distance between the brushes.
A still further object of the present invention is to provide a novel method which includes the placement of a test plate or plates between adjacent scrubber brushes of a scrubber cleaning apparatus and measurement of the frictional force of the brushes against the test plate to determine the correct gap distance between the brushes for optimal scrubbing of production wafers.
Another object of the present invention is to provide a novel brush pressure calibration apparatus and method which facilitates the real-time adjustment of the frictional force of scrubber brushes against a wafer during scrubber cleaning of the wafer.